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Hot Chips 2026 opened Sunday with the AI memory conversation shifting from capacity to packaging. d-Matrix unveiled Raptor, a 3D-DRAM accelerator that stacks a TSMC N4 logic die face-to-face onto custom DRAM instead of parking HBM beside the processor, claiming roughly 20 times the bandwidth per square millimeter of HBM and 1,000 tokens per second per user serving a 3-trillion-parameter, 1M-context model. SK Hynix used its own session to detail the mechanical and thermal tradeoffs across CoWoS-S, CoWoS-L, and Intel's EMIB as it pushes HBM3E to a 16-high, 48GB stack — a public admission that packaging, not raw memory bandwidth, is now the binding constraint. Both talks make the same structural point from opposite ends: the AI memory race has moved from the die to the package. (ServeTheHome)
Private Companies
Anthropicleadership
Anthropic hired Amir Salek — the Google engineer who built and shipped the first seven generations of the Tensor Processing Unit — onto its compute team, reporting to compute lead James Bradbury. The hire follows Anthropic's August 5 confirmation that it is standing up an in-house silicon group to co-design chips and Claude models together and cut inference costs by roughly half, even as it keeps buying from Nvidia, Google, and Amazon meanwhile. Google, Meta, and Amazon made the same bet years earlier; a model-layer lab reaching this far into the stack is that same logic, one rung down. (Bloomberg)
Quintessentlaunch
Quintessent raised an oversubscribed $40M Series A led by Cycle Capital and began sampling its first product: a laser chip that does the job of several lasers at once, cutting the power needed to move data between AI chips by 40%. It's a bet that optical wiring, not copper, is what AI clusters need next. (Businesswire)
Nscaleother
Nscale told prospective investors it has $51B in total contracted revenue as it targets a US listing as soon as September, working with Goldman Sachs and JPMorgan. The number is a forward commitment metric, not a run rate: a single multi-year compute lease counts as billions in contracted revenue the moment it is signed, well before a GPU goes live, and Nscale's actual annualized revenue run rate is closer to $400M-$500M. The gap between the two figures is exactly what public-market investors will have to underwrite. (Bloomberg)
Public Markets
Marvell gave back part of its gain from Google's warrant deal on Friday as investors weighed the fine print: most of the $12.2B stake option vests only as Google hits purchasing targets through fiscal 2033, tied to $500M chip-order tranches, not on signing. The pullback is the market re-reading a headline number into an earn-out. (Yahoo Finance)
Samsung fell as investors judged its record 90-110 trillion won ($65B-$80B) shareholder-return plan — five times its prior high — too vague on buybacks, with no commitment to cancel treasury shares, even after peers set a firmer bar the week before. The market is now pricing exactly how each company chooses to hand back its AI-memory windfall. (Reuters)
Emerging
Model handoffs: Nvidia researchers found that cross-model KV-cache transfers — swapping a small model for a larger one mid-task, or back down — can skip the expensive recomputation step entirely, using a closed-form linear map between the two models' attention caches. The result matters most for agentic systems that already cascade between cheap and expensive models to control cost, since the switching tax has effectively been the reason not to. (arXiv)
China's chip localization: Cambricon's first-half net profit surged 123% to RMB2.31B as revenue more than doubled, and Moore Threads grew revenue 147% while cutting its net loss 96%, as Beijing's push toward domestic AI silicon collides with real constraints — Bloomberg has reported yield rates near 20% on Cambricon's largest dies, made on SMIC's 7nm-class N+2 node. The results show the demand side of China's chip independence is real even where the supply side still lags. (TrendForce)